For the , it uses PSK or FSK to send a signal over power lines. In the  the example is designed for an FSK or PSK signal to be transmitted at 80 kHz see page  for reference to the RX filter calculations below.     For my design I would like to send and receive signals across multiple bands. As this is industry related, I will have to stay away from CENELEC Band A. So I would like to make use of CENELEC Band B (102.5 kHz and 117.5 kHz), C (132.5 kHz), D and a part of the FCC Band (147.5 kHz); As the ST7580 can modulate up to 250 kHz but the RX filter need select these frequencies.   I would like to find out if the following sketch is a viable option:   This is just a crude drawing, the final design will only use one inductor and the capacitor will be selected with transistors rather than all the filter components.  The two main components of the filter is C3 and L2. I would like to know if I "take" GND away from the filter via a NPN transistor, will this lead to the effect that I am going for? (Which is to have four RX filters on the same board and simply flick between them with a few pins on my microchip). Only one transistor will be on at one time.  EDIT: To clarify I am just focusing on the , as shown in the figure below boxed in red, for now. This does not have the R5 resistor included, but it is a part of the circuit.     I eventually wish to make this a selectable BPF with a few transistors. Is this a valid method of performing this by changing L2 and C3?
120450
I have asked a  but I did not get an answer, as it was too specific. So I will build on it but make it a bit more broad spectrum.  I would like to make a digitally selectable BPF using transistors to select a component in the filter; resulting in the center frequency being changed.  I have used FilterPro to generate quick second order filters and get a rough filter response.  For all the designs, a Multiple-feedback was selected:  In the first picture, a center frequency at 108KHz with a bandwidth @ -3dB of 103K to 113KHz is given.    For the second, a center frequency at 117.5KHz with a bandwidth @ -3dB of 112.8K to 122.2KHz is given.    The only difference between these two circuits is R3.  If I were to implement a circuit as shown below, would it work and what transistor would be recommended? I have selected the  as the Opamp in the circuit design as that is what was used for the .    For the transistors, I was thinking of using the MOSFETs (2N7002) used in the ST7590 design as well.
76354
I'm struggling to understand the purpose of the resistor circled in red, I know it has something to do with DC biasing and the feedback on the circuit (as the capacitor will cause AC bypass). But I'm struggling to understand the exact circumstance where this would be needed. Is it a change in supply voltage, or change in transistor beta? And the exact mechanism that would cause the resistor to solve the problem.
32579
Just wondering if someone can give me an explanation for this capacitor layout - what is it's function? The chip to the right is an ADC.  Circled in blue.    I'm guessing it is well known but i don't know how to search for it.
76090
I'm trying to understand how oscillators work and am currently working with an RC phase shift oscillator:    $$R_1, R_2, R_3 = 200 \Omega$$  $$C_1, C_2, C_3 = 4.7\text{nF}$$  one of the issues I'm having is that one source states that \$R_{\text{fb}} = 29R\$ for sustained oscillation yet when I set the resistor to \$5.8\text{k}\Omega\$ I get a flat line in nV.   What am I missing out?
37
I am looking to build a circuit to control five different FET drivers individually. The input signal would be a single shot from a function generator, which should produce five output signals, with the same frequency and phase but the duty cycles need to be individually controllable. Basically, I am trying to replace five function generators (synchronized to the same clock) with one single function generator and a circuit board due to limited resources. The outputs need to have only two levels i.e pulse wave  EDIT: Olin's suggestion (using a MCU) or a FPGA seem to be the best options but any analog alternatives are much appreciated. Thanks :)
46627
My quesiton: Is it better practice to put same-valued capacitors in parallel of capacitors of different values to decouple the high-frequency noise caused by digital ICs? Background Digital IC need a decoupling capacitor close to their supply pins to ensure a stable voltage during power transients and to deal with noise (mostly to prevent noise generated by the IC to affect neighboring circuitry). It seems sensible to place a bulk capacitor (say 10-100uF), to act as an energy reservoir, and several smaller capacitors to deal with higher frequencies. The reason to place several small capacitors instead of just one is to deal with their Equivalent Series Inductance (ESL), which in practice, causes them to behave like an LC circuit. The effect of anti-resonance Yet, here is where best design practices and electronic myth seem to get mixed up and confusing to me. Most electronic engineers I have met like placing several decoupling capacitors of different values in parallel (with the smaller capacitors closer to the IC). The logic behind it is that the each capacitor takes care of a different noise frequency as depicted in Figure 1.  Figure 1: Impedance over frequency of three different value capacitors in parallel (cyan) vs their individual contribution (brown, blue, red). Image taken from . Note the small anti-resonance peak. It seams no major trouble , and the overall behavior of the three different capacitors in parallel is vastly superior to their individual decoupling capabilities. However, I have read in  by [Henry W. Ott] that placing capacitors of different values may cause a much greater antiresonance-peak which can be very harmful for our designs (see Figure 2). In fact, it amplifies any noise that falls into the anti-resoance frequency range, which is corroborated by .  Figure 2: from Electromagnetic Compatibility Engineering, by Henry W. Ott, section 11.4.4. The 15nH inductance makes reference to the capacitors ESL.
14552
I am using ring modulator for DSB-SC  am modulation in a transmitter circuit. Can anyone please tell me about more DSB SC modulator for am modulation? I want to know which one to use where?
79830
Suppose a series RLC circuit has its resonance frequency f_r. If we apply AC current of frequency f_r to this series RLC circuit then circuit has maximum current as output. My question is little bit hypothetical. What will be the output of the series RLC circuit if we apply AC current of mixed frequency where one of its frequency is f_r? For simplicity we can assume AC current made up of two frequencies, (say f_r and f_s) where f_r != f_s. PS: I am very sorry for any incovenience. Please comment if still there is ambiguity.
58416
I'm trying to make an RGB color mixer. LED strip runs on 0.5-2A. It has internal resistors. LED Strip needs 5v, has one pin for that, one for red, one for green, and one for blue. Each LED module that you can cut off was about an inch an a half, actually a little less, and there's 5.5' of the strip, I think there's around 40 LEDs in the strip. I found this video online, but this is the exact LED strip I got. .         &ndash; Schematic created using   Original schematic.  I will be using a total of 6 volts. i saw a video where a guy made a PWM circuit, , and it looked something like this.          555-based PWM control.          Tidied-up schematic.  I meant for the threshold to connect to the trigger, but I couldn't get it to. I'm confused on how to pick my resistors, my pot, and my capacitor, because in a different video, it said something like 1.44/(R1+R2+R2)*C1=Frequency. I assume frequency is how fast the LED flickers? In this schematic, there's 2 capacitors, which do I use in the equation? Does higher frequency mean faster flickering? How fast would be too fast for the naked eye? How do I control which I way I turn the pot to make the lights brighter. And how do I know how much current is coming out of the the output? How can I control that so it doesn't burn out my LED?
33365
I stumbled across a relatively simple FM radio transmitter online.    Credit:   I wanted to understand how it works (it is called "super simple" on the website), but several hours I have nothing but a vague understanding.   I believe R2, L1, C3 form an oscillator, and then the transistor Q1 is used to modulate the signal. C1 would just be used to remove any DC offset. However, this leaves R1, C2, C4, C5, and R3 and,  for these components,  I have no clue what they do.   Could someone please explain how this "super simple" transmitter works?
39634
I was looking for an equation that could show the relationship between the range of frequencies of an EM wave, and its Maximum data transfer rate. I know that ranges of shorter wavelengths can have a larger bitrate/symbol rate, but could not find an equation relating the two variables.   Thanks in advance for the help.  EDIT: I refined my wording above. Also, no one answered my question over at amateur radio SE. As for the nyquist rate wiki page, I still could not find the answer I was looking for.
78691
In the infamous  the bandwidth of the channel is measured in Hz (Hertz) but the channel capacity is measured in bps (bits per second). So, either I'm missing something obvious or there's a dimensional mismatch in the equation.. Can somebody please help me understand?
48372
&ndash; Schematic created using   Will this work as a four-bit shift register? (And by extension a shift register of any size?) Each vertical PMOS / NMOS transistor pair acts as a multiplexer, and the PMOS transistor to its left amplifies the voltage back up to close to V_high. I'd be interested in hearing people's feedback on this. Right now I have only three transistors (and a resistor) per bit. Can I really get it that small a ratio, or are there reasons why I need more transistors per bit?  It's probably worth noting that I don't have master/slave here, so I can only assert (Shift) long enough to move one bit toward the right and no more.  Furthermore, I'm not trying to say that I need a resistor with 100 ohms. That appeared to be the only resistor I could use to make this schematic! What I want is a resistor that has significantly less resistance than the PMOS it's next to when it's at high impedance, but enough resistance to prevent a short circuit from V_high to ground when that transistor is conducting.  Okay, now I've changed each of the BJT's to MOSFET's, and reduced the resistance of each resistor from 100 ohms to 10 ohms. I'm still going on the assumption that (shift) will only be asserted long enough for the gate delays of M4 and M5, and then of M6, so the value of (dataIn) will only make it to M6's output, and won't move to M8 until the next time (shift) is asserted. Is this enough to get this circuit behaving like a four-bit shift register?
46000
I want to create a circuit that can detect audio frequencies and flash RGB LEDs different colors depending on the detected frequency. The frequency range will be from 20 Hz to 12 kHz, after looking at the chart below.   (source: )    So my question is: what circuit design should I choose to make a good frequency detector? I suppose I would need    Preamp for the microphone (is it necessary for the ADC?) Band pass filters (active or passive?) A microcontroller with an onboard ADC that has a sampling rate of at least 24 kHz.   Before I get too excited, are there any circuits out there that already do this?
113871
I was trying to understand UART fundamentals.It is understood that   It is an asynchronous communication protocol and hence the TX and RX clocks are independent of each other The data reception is guaranteed by the usage of start bit and one or more stop bits.Additionally the receiver must be aware of the data rate so as to generate suitable clock to drive the SIPO register used for  reception.   The questions here are  It is mentioned that normally a clock of 16X the bit rate is used to recover the data. So how is the conversion of bps to clock frequency possible? Please provide me some references to study the clocking mechanism employed in UART receiver.
24258
I'm designing a 4 layer PCB and I know that the standard stack-up is  Signals GND VCC Singals  (GND and VCC can be switched depending on the layer with more signals) The problem is, I don't really want to connect all ground pins through vias, there are just too many of them ! maybe because I'm not used to 4 layer PCBs, anyway, I've read a  by Henry W. Ott about a different stack-up  GND Signals Signals GND  (Where the power is being routed with wide traces on the signal planes) According to him, this is the best stack-up possible with a four-layer PCB, for the following reasons: 1.Signal layers are adjacent to ground planes. 2.Signal layers are tightly coupled (close) to their adjacent planes. 3.The ground planes can act as shields for the inner signal layers. (I think this requires stitching ??) 4.Multiple ground planes lower the ground (reference plane) impedance of the board and reduce the common-mode radiation. (don't really understand this one) One problem is cross-talk, but I really don't have any signals in the third layer, so I don't think that corss-talk will be an issue with this stack-up,am I correct in my assumption ? Note: The highest frequency is 48MHz, there's a wifi module on the board too.
98164
I need to make shallow (max 2m) underwater wireless sensor network. Data payload is about 10kB/s. I know that VLF band (~3-30kHz)could be the best solutions for that, but cause of time-to-market I cannot make hardware and software from the ground.   Maybe someone could share own-self experience in this filed.  If band 100-900MHz could be enough to send 10kB/s from one device to another - from 2m underwater to over a dozen cm from water surface?  Maybe some IC for ultrasonic communication exist? Another ideas?  Thanks