Wikipedia says that it is a idealized or physical device that implements the Boolean function.  By this definition I tend to think every digital circuits (say a counter or encoder) as a logic gate.  But it also says that "Logic circuits include such devices as multiplexers, registers, arithmetic logic units (ALUs), and computer memory, all the way up through complete microprocessors, which may contain more than 100 million gates". So according to this every complex digital circuit is not an logic gate but they are made up of logic gates.  Then I confused by the definition of logic gates. If multiplexer is not a logic gate then I tend to think XOR gate also not as logic gate. Can anyone explain this?
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So from what I understand transistors are one of the most important electronic elements for computers because of TTL (Transistors-Transistors Logic).  Is this true? If so, how exactly does this work? I have heard the terms "logic gate" and "logic block" tossed around.
104756
provides a provable quadratic speed-up for unsorted database search. The algorithm is usually expressed by the following quantum circuit:    In most representations, a crucial part of the protocol is the "oracle gate" $U_\omega$, which "magically" performs the operation $|x\rangle\mapsto(-1)^{f(x)}|x\rangle$. It is however often left unsaid how difficult realizing such a gate would actually be. Indeed, it could seem like this use of an "oracle" is just a way to sweep the difficulties under the carpet.  How do we know whether such an oracular operation is indeed realizable? And if so, what is its complexity (for example in terms of complexity of gate decomposition)?
96826
I've searched around and there's lots of good information out there, but I'm a bit of a n00b when it comes to the precise meanings of words like current, voltage, amplify, resistor, diode etc. So what at first presents itself as a simple explanation quickly turns into a wikipedia tabfest of ever increasing complexity. With that in mind please forgive my probably inaccurate use of these terms in this post.  The basic problem for me is that gates on a logic circuit appear to be creating power from nothing, which is impossible. For example imagine two NOT gates connected in sequence: To my uninitiated mind what seems to be happening is that the first NOT gate cuts the power to the second NOT gate, which responds by magically conjuring new power out of thin air and sending it on it's way. The only explanation I can come up with feels a bit redundant and absurd (That every single gate on the diagram is implied to be directly connected to a power source)  The closest I've come to an answer is something to do with changing the "signal" from "high" to "low" but again, I'm not familiar enough with the language. It still suffers from the same problem, if you've got a low signal how is it that a NOT gate can turn it into a high one without directly drawing on a power source?  To wrap up and present the question in all it's rookie glory: How do logic gates physically convert 0 to 1 without violating the law of conservation of energy?
23951
How can I construct a controlled-Hadamard gate using single qubit gates and controlled phase-shift? I am stuck in this and any help would be appreciated.
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I understand that binary is effectively functioning as a “virtual representation” of low voltage and high voltage. However, I do not understand how the instruction set to MAKE the voltage high or low is being executed. Within a computer, what is physically happening to change a circuit to a “high voltage state” or a “low voltage state”?  This is presumably the lowest level instruction set that exists within computers...and I’m not quite sure I understand how it is being implemented. What is making the circuit change between high and low voltage states...and, moreover, how are these instructions designed to ENACT such a change in voltage state actually being carried out?   This is like the “instruction set that proceeds all other instruction sets”...or the “instruction set that exists BEFORE binary instruction sets can even be formed”. How does one program a circuit to do something before a programming language even exists?  In other words: How does a computer chip convert the "text" or bits that make up the program into action? How does it read the code, decide what the code is saying, and then act on what the code is saying?
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I am trying to create a logic circuit using only NAND Gates for this expression: (NOT Q AND P) OR R   This question has really gotten me stuck! Can somebody please help?
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I was tasked with creating a function "transitions" that takes as input a value of type std_logic of arbitrary length. The returned value should be an integer that records the number of transitions (0 → 1, or 1 → 0) as you scan the binary bit pattern from left to right (or right to left). For example, the value 0110010011 would return 5; the value 001 would return 1.  Below is a piece of VHDL code that you can use to test your function. Add your function to the code and simulate to check that your code is giving the correct result. Show your code and the simulation results. In your simulation, display the first 100 ns, with t2, t4, t6 and t8 all shown as either signed or unsigned decimal and data displayed as binary.  library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity test_transitions is end test_transitions;  architecture Behavioral of test_transitions is   signal data: std_logic_vector (7 downto 0):="01111100";   signal t8, t6, t4, t2: integer; begin   tt: process   begin     wait for 10 ns;     data &lt;= data+1;   end process tt;    t8 &lt;= transitions(data);   t6 &lt;= transitions(data(5 downto 0));   t4 &lt;= transitions(data(3 downto 0));   t2 &lt;= transitions(data(1 downto 0));  end Behavioral;   Here's what I coded but keep receiving multiple syntax errors when I perform the Behavioral Check Syntax Test in the Xilinx ISE Design Suite. Any help would be greatly appreciated.  library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL;  entity TransitionFunction is end TransitionFunction;  architecture Behavioral of TransitionFunction is    function transition(signal data: in std_logic) return integer is      variable count: integer;   begin     count:= 0;     for i in data'range loop       if data(i) /= data(i+1) then         count := count + 1;       end if;     end loop;     return count;   end transition;    signal data: std_logic_vector(7 downto 0):="01111100";   signal t8, t6, t4, t2: integer; begin    tt:   process   begin     wait for 10 ns;     data &lt;= data+1;   end process tt;    t8 &lt;= transitions(data);   t6 &lt;= transitions(data(5 downto 0)));   t4 &lt;= transitions(data(3 downto 0)));   t2 &lt;= transitions(data(1 downto 0)));   end Behavioral;   Error messages:
38762
The XOR operator seems to be a frequently used building block inside many cryptographic primitives.  As far as I can see, its most desirable properties seem be that for the XOR of two bits $a\oplus b=c$:   The information is preserved.  Either $a$ or $b$ can be recovered from $c$ and the other bit. The information is hidden.  An adversary can not learn anything about $a$ or $b$ from $c$ alone.   Neither AND nor OR has these properties but XNOR does.  It seems like any cryptographic application using XOR could be constructed equivalently with XNOR, without incurring any loss in security.  One possible reason to prefer XOR might be that XOR is equivalent to addition modulo 2, whereas XNOR would be addition plus 1 modulo 2, but this seems to be entirely mathematical, and I'm not sure if it actually results in any additional hardware complexity in practice.  Is the choice of XOR then an arbitrary one, made for historical reasons, or is there any tangible underlying motivation for using it over XNOR?
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Task: Construct an AND circuit with 8 inputs, a circuit which implements the expression a∧b∧c∧d∧e∧f∧g∧h.  Condition: Use only NAND-Gates with two inputs to solve this task.  Could anyone explain to me how to solve this question?  Thanks.  Edit: My thought would be to do sth. like this:    Could that be right?    Edit: My new idea:         &ndash; Schematic created using
61446
So we have AND, NOT, NAND, NOR, OR gates, but how are they created electronically/electrically?  For example, what makes NOT gate reverse the value?
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In a semiconductor memory chip, each bit of binary data is stored in a tiny circuit called a memory cell consisting of one to several transistors. Volatile type.   Suppose an application stored its data in a particular segment on the computers RAM.  How would the CPU know what data to extract and how would it sort through the other data to get to it. If everything in its core level is 0 or 1 its hard to distinguish what purpose 'x' memory has.
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In my experimentation, I've used only BJTs as switches (for turning on and off things like LEDs and such) for my MCU outputs. I've been repeatedly told, however, that N-channel enhancement-mode MOSFETs are a better choice for switches (see  and , for examples), but I'm not sure I understand why. I do know that a MOSFET wastes no current on the gate, where a BJT's base does, but this is not an issue for me, as I'm not running on batteries. A MOSFET also requires no resistor in series with the gate, but generally DOES require a pull-down resistor so the gate doesn't float when the MCU is rebooted (right?). No reduction in parts count, then. There doesn't seem to be a great surplus of logic-level MOSFETs that can switch the current that cheap BJTs can (~600-800mA for a 2N2222, for example), and the ones that do exist (TN0702, for example) are hard to find and significantly more expensive. When is a MOSFET more appropriate than a BJT? Why am I continually being told that I should be using MOSFETs?
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I need to understand how exactly this circuit works, there is not much references and books on those circuits, they're used as "power" oscillator for DC AC conversion for wireless. i finally found their name after being so downvoted here when i asked if oscillators can be used to generate power.    here is something i found on how it works (i'm not sure you need that to answer my question)   i also know that the mos control voltage is arranged in such a way to perform switching at ZERO BIAS VOLTAGE. what i really need to understand first is what are the  capacitors C4 and C5 on the gate drive and how are they calculated, also what are the zener diodes for exactly? and i think the shottky is for have a fast turn off right?  here are different other circuits of the royer i found, if this may help, it seems like there are two types,       thank you very much.
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I would like to use a pull-down resistor on the input of a NOT logic gate. I am using a 5V microcontroller, and I want to ensure that the input of the gate will never be floating (eg. microcontroller damage).  General information:  The logic gate I am using is a HD74LS04 inverter whose datasheet can be found . I am testing the output by placing my positive multi-meter lead on R4 and the negative lead on GND. With the digital pin floating, the output of 1Y is 4.33V. This is the expected behavior.  The logic gate requires a minimum of 2.0V for Vih. If I understand this circuit correctly, I expect the voltage at pin 1A to be 3.76V since R2 and R3 will form a voltage divider. This value seems plenty to signify a 'high' in the logic gate.  R2 exists to protect the digital pin. Ideally, I would have liked R2 to be 1KΩ. Increasing the value of R2 means I have to increase the value of R3 to maintain the same voltage divider. During testing I found that if R3 was any value over 3.3KΩ, the pin 1A would not get pulled down all the way if I left the digital pin floating.   Tests: If I disconnect everything except GND and Vcc and place the positive lead of my multi-meter on pin 1A (now floating) and the negative lead to GND, I read 1.49V. Placing a pull-down resistor (R3) on pin 1A to GND with a value of 100Ω changes the reading to 0.02V. Increasing the resistor's value to 330Ω increases the reading to 0.07V. At the value I need, 3.3KΩ, the reading increases to 0.60V. Finally, changing the resistor's value to 1MΩ increases the reading to 1.47V and actually changes the output of pin 1Y to low.  The test that uses the 3.3KΩ resistor is concerning. The reading I took (0.60V) seems to be approaching the Vil maximum of the logic gate which is 0.80V.   Questions:  This must be a trivial question, but why does an R3 value of 3.3KΩ not pull pin 1A all the way to GND? Is there a formula for determining the correct pull-down resistor value? Other answers I found on here simply state 10KΩ as a 'good' value for a pull-up resistor. I'm not sure where that value comes from or if it is applicable to a pull-down resistor.         &ndash; Schematic created using   Edit: Although Ignacio's answer technically answers the question, I thought I would share some information I found for others who may come across this question.  User 'Papabravo' on the  states that the calculation for a pull down resistor can be calculated by taking the Vil (0.8V) and dividing it by the "standard TTL load" of 1.6mA. As Ignacio pointed out, my specific logic gate can source up to 0.4mA, so the calculation would be 0.8/0.0004A which equals 2KΩ. For safety, I performed the calculation at 0.5V in order to give myself some headroom.  Other Resources:
121122
I was implementing the ALU from the specs given in my The Elements of Computing systems book. I am stuck on only one problem. How do I find if a given number is zero or not. One thing I can do is or every bit in the bus, and then apply a not gate on that. But there has to be some other elegant solution.
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I'm interested to know how people have, or would construct an interface which simplifies constructing logical boolean conditions? (Yes, it's a database query builder) In my mind a bad interface has them typing lots of AND, NOT IN, OR keywords etc. Or else has a million combo boxes.  I'm wondering if anyone has a good example I could glean ideas from? Or some suggestions?  At the moment I'm considering a split screen with a grid for composing the query and a canvas to display a visual representation of the sets of conditions and how they overlap etc. Like a Venn Diagram. This still gives me a problem with the usability/intuitiveness of the controls on the grid.  EDIT:  I'm very interested in ideas which simplify it for less technical users. However, ideas for a version of the UI for advanced users are very helpful as well.
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My problem is about AND-gate when its inputs are open. I want to know: What is the output when inputs are open? The output is Z (open) or 0?   What is your idea about this AND-gate transistor structure?     ()  My answer to the above structure is that the output is 0 when the two inputs are open, or at least one of them is 0.